Z86319 Datasheet, PDF (17/23 Pages) Zilog, Inc. – PS/2 MOUSE CONTROLLER

Zilog
Z86319
PS/2 Mouse Controller
RC Oscillator. The Z86319 features an on-chip RC pre- In HALT Mode, the value of each output line prior to the
cision oscillator that requires a 1% precision resistor exter- HALT instruction is retained.
nally connected between V_DD and pin 6 (Figure 18). The
tolerance of the RC oscillator is less than ±10% over the
Watch-Dog Timer (WDT). The Watch-Dog Timer is en-
1
voltage range of 4.5V to 5.5V and over a temperature ^{abled upon power-up of the MCU and is clocked by its own}
range of 0-40°C. Pin 7 is the Analog Ground for the oscilla- ^{internal RC oscillator. The WDT instruction does not affect}
tor.
the Zero (Z), Sign (S), and Overflow (V) flags.
Increased parasitic board capacitance will slow down the
RC oscillator and deteriorate the RC frequency tolerance.
The minimum and maximum parasitic board capacitances
are 0.5 pF and 2 pF, respectively.
VDD
1%
6
7
RCIN
AGND
Opcode WDT (5FH). Execution of WDT clears the WDT
counter. The time interval between any 2 consecutive
WDT instructions has to be smaller than T_WDT min.
Low Voltage Protection (V_LV). The device will func-
tion normally between 5.5V and 4.5V under all specified
conditions. Below 4.5V, the device is still internally func-
tional until the Low Voltage trip point (V_LV) is reached,
however, it is not guaranteed to meet all AC and DC Char-
acteristics. When the supply voltage drops below V_LV, an
automatic hardware reset occurs as V_DD returns above
V_LV. Essentially, this action helps in reinitializing the
Z86319.
Precision
RC Oscillator
Figure 18. Oscillator Configuration
HALT Mode. This instruction turns off the internal CPU
clock but not the precision RC oscillator. The counter/tim-
ers, their interrupts, and external interrupts IRQ1 and IRQ2
remain active. The device can be recovered by interrupts,
either externally or internally generated. An interrupt must
be enabled prior to the HALT Mode, and executed to exit
the HALT Mode. After the interrupt service routine, the
program continues from the instruction after the HALT.
The actual V_LV is a function of temperature, operating fre-
quency and process parameters. The typical V_LV is a
function of the ambient temperature for a frequency of 4
MHz. The device is functional down to V_LV voltage. The
min. operational V_DD is determined by the value of the V_LV
voltage at ambient temperatures. The V_LV voltage in-
creases as the temperature decreases (Figure 19).
In order to enter HALT Mode, it is necessary to first flush
the instruction pipeline to avoid suspending execution in
mid-instruction. To flush the pipeline, the user must exe-
cute a NOP (Opcode=FFH) immediately before the HALT
instruction. i.e.:
FF
NOP
; clear the pipeline
7F
HALT ; enter the HALT Mode
DS97KEY1605
PRELIMINARY
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