Z8623012SSG Datasheet, PDF (15/61 Pages) Zilog, Inc. – ADVANCED PROGRAM BLOCKING AND NTSC LINE 21 XDS DECODER

BLOCK DIAGRAM AND OPERATIONAL OVERVIEW
PIN DESCRIPTIONS
TABLE 1. PIN DESCRIPTIONS
Symbol Pin # Function
LPF
9
Loop Filter
RREF 10
V_SS(A) 11
V_DD
12
Resistor Reference
Power Supply
(Anlalog) GND
Power Supply +5V
PB
13 Program Blocking
SDA
14
SCLK 15
Serial Data
Serial Clock
NC
16
INTRO 17
No Connect
Interrupt Output
NC
18 No Connect
Direction Description
Output
Loop Filter. A series RC low-pass filter must be
tied between this pin and analog ground
V_SS(A). There must also be second capacitor
from the pin to V_SS(A).
C6
C7 R5 9
C5 8
LPF
CSYNC
Input
N/A
N/A
Output
In/Output
Input
N/A
Output
N/A
Reference setting resistor. This resistor must
be 10 kOhms, ±2%.
This pin is the lowest potential power pin for
the analog circuit that is typically tied to
system ground.
The voltage on this pin is nominally 5.0 Volts,
and may range between 4.75 to 5.25 Volts with
respect to the V_SS pins.
This pin is HIGH(1) when the received Content
Advisory packet matches the viewers
selection as entered into the Content Advisory
Rating Select registers.
This pin is the bidirectional data line for
sending and receiving serial data.
This pin acts as an input pin for the serial clock
signal from the I²C master. The clock rate is
expected to be within I²C limits.
No Connect
This pin provides an interrupt signal to the
master control device in accordance with the
settings in the Interrupt Mask Register.
No Connect
PS000401-TVC0699
Z86230—PRELIMINARY
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