SP5511 Datasheet, PDF (5/12 Pages) Zarlink Semiconductor Inc – Bidirectional I2C Bus 4-Address Synthesiser

SP5511
MSB
LSB
Address
Programmable divider
Programmable divider
1 1 0 0 0 MA1 MA0 0 A
0 2¹⁴ 2¹³ 2¹² 2¹¹ 2¹⁰ 2⁹ 2⁸ A
2⁷ 2⁶ 2⁵ 2⁴ 2³ 2² 2¹ 2⁰ A
Charge pump and test bits 1 CP T1 T0 1 1 1 OS A
I/O port control bits
P7 P6 P5 P4 P3 P2* P1* P0* A
Table 1 Write data format (MSB transmitted first)
Byte 1
Byte 2
Byte 3
Byte 4
Byte 5
Address
Status byte
1 1 0 0 0 MA1 MA0 1 A Byte 1
POR FL I2 I1 I0 A2 A1 A0 A Byte 2
Table 2 Read data format
A2 A1 A0 Voltage input to P6
1 00
0·6V_CC to 13·2V
0 11
0·45V_CC to 0·6V_CC
0 10
0·3V_CC to 0·45V_CC
0 01
0·15V_CC to 0·3V_CC
0 00
0V to 0·15V_CC
Table 3 ADC levels
MA1 MA0 Voltage input to P3
00
01
0V to 0·1V_CC
Open circuit
1 0 0·4V_CC to 0·6V_CC†
11
0·9V_CC to V_CC
Table 4 Address selection
A
MA1, MA0
CP
T1
T0
OS
P7, P6, P5, P4,
P3, P2*, P1*, P0*
POR
FL
I2, I1, I0
A2, A1, A0
: Acknowledge bit
: Variable address bits (see Table 4)
: Charge Pump current select
: Test mode selection
: Charge pump disable
: Varactor drive Output disable Switch
: Control output port states
: Power On Reset indicator
: Phase lock detect flag
: Digital information from ports P7, P5 and P4 respectively
: 5-level ADC data from P6 (see Table 3)
NOTE
† Programmed by connecting a 15kΩ resistor between pin 10 and V_CC
* ^{Don’t care condition on SP5511S.}
Fig. 3 Data formats
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