SP5511 Datasheet, PDF (3/12 Pages) Zarlink Semiconductor Inc – Bidirectional I2C Bus 4-Address Synthesiser

ABSOLUTE MAXIMUM RATINGS
All voltages are referred to V_EE and pin 3 at 0V
Parameter
Pin
SP5511 SP5511S
Supply voltage
RF input voltage
Port voltage
14
15,16
6-9,11-13
6-9
11-13
10
12
13,14
6-9
6-9
-
10
Total port output current
RF input DC offset
Charge pump DC offset
Drive output DC offset
Crystal oscillator DC offset
SDA, SCL input voltage
6-9,11-13
15-16
1
18
2
4,5
6-9
13-14
1
16
2
4,5
Storage temperature
Junction temperature
DP18 thermal resistance, chip-to-ambient
DP18 thermal resistance, chip-to-case
MP16 thermal resistance, chip-to-ambient
MP16 thermal resistance, chip-to-case
Power consumption at 5·5V
SP5511
Value
Min.
Max.
Units
Conditions
20·3
20·3
20·3
20·3
20·3
20·3
20·3
20·3
20·3
20·3
20·3
7
2·5
14
6
14
V_CC10·3
50
V_CC10·3
V_CC10·3
V_CC10·3
V_CC10·3
V_CC10·3
5·5
V
V p-p
V
V
V
V
mA
V
V
V
V
V
V
Port in off state
Port in on state
Port in on state
With V_CC applied
V_CC not applied
255
1150
°C
1150
°C
78
°C/W
24
°C/W
111
°C/W
41
°C/W
363
mW
RF IN
RF IN
SCL
SDA
PRE
AMP
POWER ON
LOCK
DETECTOR DETECTOR
I²C BUS
TRANSCEIVER
ADDRESS 3-BIT
SELECT ADC
3 TTL
LEVEL
COMP
48
PRESCALER
15 BIT
FDIV
PROGRAMMABLE
DIVIDER
PHASE
COMP
F
FCOMP _DIVIDER
4512
15 BIT DIVIDER
RATIO LATCH
8-BIT LATCH
PORT
INFORMATION
CHARGE
PUMP
T0 CP
CONTROL
DATA
LATCH
T1
OS
LOGIC
OSC
4MHz
VCC
Q1
CRYSTAL
Q2
CHARGE
PUMP
DRIVE
OUTPUT
VEE
P3
P0 P1 P2 P4 P5 P6 P7
Fig. 2 Block diagram. (Ports P0-P2 not present on SP5511S)
3