SP1648 Datasheet, PDF (4/7 Pages) Zarlink Semiconductor Inc – ECL OSCILLATOR

SP1648
Fig.3 Spectral purity of signal at output
OPERATING CHARACTERISTICS
Fig.2 illustrates the circuit schematic for the SP1648.
The oscillator incorporates positive feedback by coupling the
base of transistor TR7 to the collector of TR8. An automatic
gain control (AGC) is incorporated to limit the current through
the emitter-coupled pair of transistors (TR7 and TR8) and
allow optimum frequency response of the oscillator.
In order to maintain the high Q of the oscillator, and
provide high spectral purity at the output, a cascode
transistor (TR4) is used to translate from the emitter follower
(TR5) to the output differential pair TR2 and TR3. TR2 and
TR3, in conjunction with output transistor TR1, provide a
highly buffered output which produces a square wave.
Transistors TR10 through TR14 provide this bias drive for the
oscillator and output buffer. Fig.3 indicates the high spectral
purity of the oscillator output.
Fig.4 Test circuit and waveforms