MT9196 Datasheet, PDF (38/46 Pages) Mitel Networks Corporation – ISO2-CMOS Integrated Digital Phone Circuit (IDPC)

MT9196
Data Sheet
AC Electrical Characteristics^† - ST-BUS Timing (See Figure 12)
Characteristics
Sym. Min. Typ.^‡ Max. Units
Test Conditions
1 C4i Clock Period
t_C4P
244
ns
2 C4i Clock High period
t_C4H
122
ns
3 C4i Clock Low period
t_C4L
122
ns
4 C4i Clock Transition Time
t_T
20
ns
5 F0i Frame Pulse Setup Time
t_F0iS
50
ns
6 F0i Frame Pulse Hold Time
t_F0iH
50
ns
7 DSTo Delay
t_DSToD
100 125
ns C_L = 50pF, 1kΩ load.*
8 DSTi Setup Time
t_DSTiS
30
ns
9 DSTi Hold Time
t_DSTiH
30
ns
† Timing is over recommended temperature range & recommended power supply voltages.
‡ Typical figures are at 25 °C and are for design aid only: not guaranteed and not subject to production testing.
* Note: All conditions → data-data, data-HiZ, HiZ-data.
C4i
70%
30%
DSTo
70%
30%
DSTi
70%
30%
F0i
70%
30%
t_T
1 bit cell
t_C4P
t_DSToD
t_C4H
t_T
t_C4L
t_DSTiS
t_DSTiH
t_T
t_F0iS
t_F0iH
t_T
NOTE: Levels refer to%V_DD
Figure 12 - ST-BUS Timing Diagram
38
Zarlink Semiconductor Inc.