MT9196 Datasheet, PDF (34/46 Pages) Mitel Networks Corporation – ISO2-CMOS Integrated Digital Phone Circuit (IDPC)

MT9196
Data Sheet
AC Characteristics^† for A/D (Transmit) Path - 0dBm0 = 1.421V_rms for µ-Law and 1.477V_rms for
A-Law, at the CODEC. (V_Ref=1.0 volts and V_Bias=2.5 volts.)
Characteristics
Sym. Min. Typ.^‡ Max. Units
Test Conditions
1 Analog input equivalent to
overload decision
A_Li3.17
A_Li3.14
5.79
6.0
Vp-p
Vp-p
µ-Law
A-Law
Both at CODEC
2 Absolute half-channel gain
M ± to PCM
G_AX1
G_AX2
5.0 6.0 7.0
14.3 15.3 16.3
Transmit filter gain=0dB
setting. Digital gain=0dB
setting.
dB TxINC = 0*
dB TxINC = 1*
MIC + to PCM
G_AX3
G_AX4
9.5 11 12.5
18.8 20.3 21.8
dB TxINC = 0*
dB TxINC = 1*
AUXin to PCM
G_AX5
G_AX6
9.5 11 12.5
18.8 20.3 21.8
dB TxINC = 0*
dB TxINC = 1*
@1020 Hz
Tolerance at all other transmit
filter settings
(1 to 7dB)
-0.2
+0.2
dB
3 Gain tracking vs. input level
CCITT G.714 Method 2
G_TX
-0.3
-0.6
-1.6
0.3
dB 3 to -40 dBm0
0.6
dB -40 to -50 dBm0
1.6
dB -50 to -55 dBm0
4 Signal to total Distortion vs. input D_QX
35
level
29
CCITT G.714 Method 2
24
dB 0 to -30 dBm0
dB -40 dBm0
dB -45 dBm0
5 Transmit Idle Channel Noise
6 Gain relative to gain at 1020Hz
<50Hz
60Hz
200Hz
300 - 3000 Hz
3000 - 3400 Hz
4000 Hz
>4600 Hz
N_CX
15 16.5 dBrnC0 µ-Law
N_PX
-71 -69 dBm0p A-Law
G_RX
-25
dB
-30
dB
0.0
dB
-0.25
0.25
dB
-0.9
0.25
dB
-12.5 dB
-25
dB
7 Absolute Delay
D_AX
360
µs at frequency of minimum
delay
8 Group Delay relative to D_AX
D_DX
750
380
130
750
µs 500-600 Hz
µs 600 - 1000 Hz
µs 1000 - 2600 Hz
µs 2600 - 2800 Hz
9 Power Supply Rejection
f=1020 Hz
f=0.3 to 3 kHz
f=3 to 4 kHz
f=4 to 50 kHz
PSSR 37
PSSR1 40
PSSR2 35
PSSR3 40
100mVRMS
V_DD
dB µ-law
dB PSSR1-3 not production
dB tested
dB
† AC Electrical Characteristics are over recommended temperature range & recommended power supply voltages.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
* Note: TxINC, refer to Control Register 2, address 0Fh.
34
Zarlink Semiconductor Inc.