ZL50233_06 Datasheet, PDF (27/38 Pages) Zarlink Semiconductor Inc – 4 Channel Voice Echo Cancellor

ZL50233
Data Sheet
Power-up
48_hex
Bit 7
Bit 6
DTDT15 DTDT14
ECA: Double-Talk Detection Threshold Register 2
ECB: Double-Talk Detection Threshold Register 2
Bit 5
DTDT13
Bit 4
DTDT12
Bit 3
DTDT11
Bit 2
DTDT10
R/W Address:
15_hex + Base Address
R/W Address:
35_hex + Base Address
Bit 1
Bit 0
DTDT9
DTDT8
Power-up
00_hex
ECA: Double-Talk Detection Threshold Register 1
ECB: Double-Talk Detection Threshold Register 1
R/W Address:
14_hex + Base Address
R/W Address:
34_hex + Base Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DTDT7 DTDT6
DTDT5
DTDT4
DTDT3
DTDT2
DTDT1
DTDT0
Functional Description of Register Bits
This register allows the user to program the level of Double-Talk Detection Threshold (DTDT). The 16 bit 2’s
complement linear value defaults to 4800_hex= 0.5625 or -5 dB. The maximum value is 7FFF_hex = 0.9999 or
0 dB. The high byte is in Register 2 and the low byte is in Register 1.
Power-up
0C_hex
Bit 7
NLP15
Bit 6
NLP14
ECA: Non-Linear Processor Threshold Register 2
(NLPTHR)
ECB: Non-Linear Processor Threshold Register 2
(NLPTHR)
Bit 5
NLP13
Bit 4
NLP12
Bit 3
NLP11
Bit 2
NLP10
R/W Address:
19_hex + Base Address
R/W Address:
39_hex + Base Address
Bit 1
Bit 0
NLP9
NLP8
Power-up
E0_hex
ECA: Non-Linear Processor Threshold Register 1
(NLPTHR)
ECB: Non-Linear Processor Threshold Register 1
(NLPTHR)
R/W Address:
18_hex + Base Address
R/W Address:
38_hex + Base Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
NLP7
NLP6
NLP5
NLP4
NLP3
NLP2
NLP1
NLP0
Functional Description of Register Bits
This register allows the user to program the level of the Non-Linear Processor Threshold (NLPTHR). The 16 bit
2’s complement linear value defaults to 0CE0_hex = 0.1 or -20.0 dB. The maximum value is 7FFF_hex = 0.9999 or
0 dB. The high byte is in Register 2 and the low byte is in Register 1.
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Zarlink Semiconductor Inc.