ZL30402 Datasheet, PDF (27/41 Pages) Zarlink Semiconductor Inc – SONET/SDH Network Element PLL

ZL30402
Data Sheet
5.1.3 Dual Reference Operation: NORMAL --> AUTO HOLDOVER--> HOLDOVER --> NORMAL
The NORMAL to AUTO-HOLDOVER to HOLDOVER to NORMAL sequence represents the most likely operation of
ZL30402 in Network Equipment.
The sequence starts from the Normal state and transitions to Auto Holdover state due to an unforeseen loss of
reference. The failure conditions triggering this transition were described in section 4.1.2. When in the Auto
Holdover state, the ZL30402 can return to Normal mode automatically if the lost reference is restored and the
ADHR bit is set to 0. If the reference clock failure persists for a period of time that exceeds the system design limit,
the system control processor may initiate a reference switch. If the secondary reference is available the ZL30402
will briefly switch into Holdover mode and then transition to Normal mode.
MS2, MS1 == 01 OR
RefSel change
NORMAL
(LOCKED)
00
RESET == 1 ^{MS2, MS1! = 10}
Ref: OK &
MS2, MS1 == 00
{AUTO}
Ref: OK --> FAIL &
MS2, MS1 == 00
{AUTO}
RESET
FREE-
RUN
10
HOLD-
OVER
01
RefSel Change
AUTO
HOLD-
OVER
Ref: FAIL --> OK &
MS2, MS1 == 00 &
AHRD=1 &
MHR= 0-->1 then 1-->0
{MANUAL}
Ref: FAIL --> OK &
MS2, MS1 == 00 &
AHRD=0
{AUTO}
MS2, MS1 == 10 forces
unconditional return from
any state to Free-run
AHRD=0
(automatic return enabled)
Figure 9 - Entry into Auto Holdover state and recovery into Normal mode by switching
references
The new reference clock will most likely have a different phase but it may also have a different fractional frequency
offset. In order to lock to a new reference with a different frequency, the Core PLL may be stepped gradually
towards the new frequency. The frequency slope will be limited to less than 2.0 ppm/sec.
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Zarlink Semiconductor Inc.