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MT8986 Datasheet, PDF (27/46 Pages) Mitel Networks Corporation – CMOS ST-BUS™ FAMILY Multiple Rate Digital Switch
MT8986
Data Sheet
Test Point
Output
Pin
RL
S1
CL
VSS
VDD
S2
VSS
S1 is open circuit except
when testing output levels
or high impedance states.
S2 is switched to VDD or
VSS when testing output
levels or high impedance
states.
Figure 15 - Output Test Load
AC Electrical Characteristics† _ ST-BUS Timing (2.048 Mb/s) - Voltages are with respect to ground (VSS) unless otherwise
stated.
Characteristics
Sym. Min. Typ.‡ Max. Units
Test Conditions
1 Frame Pulse width
tFRW
244
ns
2 Frame Pulse setup time
tFRS
10
190
ns
3 Frame Pulse hold time
tFRH
20
190
ns
4 STo delay Active to Active
tDAA
45
100
ns
5 STi setup time
tSTIS
20
ns
6 STi hold time
tSTIH
20
ns
7 Clock period
tCLK
190
244
300
ns
8 CK Input Low
tCL
85 122 150
ns
9 CK Input High
tCH
85
122 150
ns
10 Clock Rise/Fall Time
tr,tf
10
ns
†
‡
Timing
Typical
is over
figures
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to 85°C).
testing.
CL=150 pF
27
Zarlink Semiconductor Inc.