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ZL50022 Datasheet, PDF (11/121 Pages) Zarlink Semiconductor Inc – Enhanced 4 K Digital Switch with Stratum 4E DPLL
ZL50022
Data Sheet
1.0 Pinout Diagrams
1.1 BGA Pinout
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A VSS STi29 STi28 STi27 STi25 STi26 STi24
B STi31 STi10 STi5
STi4 CKo2
STi0
CKo0
C STi30 STi9
VSS
STi7
STi6
STi1
CKo1
D STi17 STi11 VDD_IO STi3
STi2 CKo4 REF3
E STi16 STi14
STi8
VDD_IO
F STi19 STi15 STi12 STi13
G STi18
RESET IC_GND
IC_
OPEN
VSS
VDD_IO
TDo
VDD_
CORE
VDD_
CORE
VDD_IO
H STi21 VSS
VSS
VDD_
CKo5
VSS
COREA
REF_
FAIL3
VDD_
CORE
VSS
VSS
J STi20 VDD_IOA VDD_IOA VSS
VSS
CKo3
VSS
K STi22 VSS
TMS
L STi23
VDD_
COREA
TRST
M STio25 NC
TDi
VSS
TCK
D0
VDD_
COREA
VDD_IO
VSS
VDD_IO
VDD_
CORE
VDD_
CORE
VSS
VDD_
CORE
VDD_
CORE
N STio24 NC
VDD_IO STio0 STOHZ3 D1
D5
NC
REF2
REF_
FAIL2
REF1
REF_
FAIL1
VSS
VSS
VSS
VSS
VSS
VSS
D6
D7
NC STio22 STio23 STio21 STio20 NC
NC
VSS
A
VDD_
COREA
VSS
REF_
FAIL0
REF0
VSS
FPi
IC_
OPEN
VSS
NC
VDD_
CORE
CKi
IC_
IC_
OPEN OPEN
OSCi
ODE
STio19 B
IC_
OPEN
OSCo IC_GND
VSS
STio15 STio18 C
FPo_
OFF1
OSC_
EN
STio13
VDD_IO STio14
STio16 D
VDD_
CORE
VDD_
CORE
VSS
VDD_IO STio12
VDD_IO
IC_
OPEN
FPo3
FPo2 STio17 E
FPo_
OFF2
STOHZ15 F
VSS
VSS
VDD_IO
A12
A13
FPo1 FPo0 STOHZ14 G
VSS
VSS
A7
A9
A10
FPo_
OFF0
A11 STOHZ12 H
VSS
VSS
A3
A4
A5
A8
A6 STOHZ13 J
VSS
VSS
VDD_IO
IC_
OPEN
A0
A2
A1 STOHZ11 K
VSS
VDD_
VDD_ VDD_IO STio10 STio11 STio9 STOHZ10 L
CORE
CORE
D10
VDD_
CORE
VDD_
CORE
VSS
MOT MODE_
_INTEL 4M0
STio8
STOHZ9 M
D11
D13
R/W
_WR
DTA_
RDY
STio4 VDD_IO STOHZ5 STOHZ8 N
P STio26 NC
VSS
STio1 STio3 STOHZ1 D3
D8
D14
IRQ
STio5 STOHZ4 STOHZ6 VSS STOHZ7
NC P
R STio27 NC STOHZ0 STio2 STOHZ2 D2
D4
D9
D12
D15
CS
DS_RD
MODE_
4M1
STio6
STio7
NC R
T VSS STio28 STio29 STio31 STio30
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VSS
T
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Note: A1 corner identified by metallized marking.
Note: Pinout is shown as viewed through top of package.
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Figure 2 - ZL50022 256-Ball 17 mm x 17 mm PBGA (as viewed through top of package)
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Zarlink Semiconductor Inc.