ZL30102_05 Datasheet, PDF(10/48 Page) Zarlink Semiconductor Inc – T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110

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ZL30102_05 Datasheet, PDF (10/48 Pages) Zarlink Semiconductor Inc – T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for DS1/E1 and H.110

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ZL30102

Data Sheet

Pin #

Name

C8/C32o

AVDD

C2o

C16o

F8/F32o

F4/F65o

F16o

AGND

REF_SEL0

REF_SEL1

REF0

REF1

REF2

Description

Clock 8.192 MHz or 32.768 MHz (Output). This output is used for ST-BUS and GCI

operation at 8.192 Mb/s or for operation with a 32.768 MHz clock. The output frequency

is selected via the OUT_SEL pin, see Table 3 on page 19.

In C8 mode, this clock output pad uses an included Schmitt input as a PLL feedback

path; proper transmission-line termination should be applied to maintain reflections below

Schmitt trigger levels.

Positive Analog Supply Voltage. +3.3 VDC nominal

Clock 2.048 MHz (Output). This output is used for standard E1 interface timing and for

ST-BUS operation at 2.048 Mbit/s.

This clock output pad includes a Schmitt input which serves as a PLL feedback path;

proper transmission-line termination should be applied to maintain reflections below

Schmitt trigger levels.

Clock 16.384 MHz (Output). This output is used for ST-BUS operation with a

16.384 MHz clock.

This clock output pad includes a Schmitt input which serves as a PLL feedback path;

proper transmission-line termination should be applied to maintain reflections below

Schmitt trigger levels.

Frame Pulse (Output). This is an 8 kHz 122 ns active high framing pulse or it is an 8 kHz

31 ns active high framing pulse, which marks the beginning of a frame. The pulse width is

selected via the OUT_SEL pin, see Table 3 on page 19.

Frame Pulse ST-BUS 2.048 Mbit/s or ST-BUS at 65.536 MHz clock (Output). This

output is an 8 kHz 244 ns active low framing pulse which marks the beginning of an ST-

BUS frame. This is typically used for ST-BUS operation at 2.048 Mbit/s and 4.096 Mbit/s.

Or this output is an 8 kHz 15 ns active low framing pulse, typically used for ST-BUS

operation with a clock rate of 65.536 MHz. The pulse width is selected via the OUT_SEL

pin, see Table 3 on page 19.

Frame Pulse ST-BUS 8.192 Mbit/s (Output). This is an 8 kHz 61 ns active low framing

pulse, which marks the beginning of an ST-BUS frame. This is typically used for ST-BUS

operation at 8.192 Mbit/s.

Analog Ground. 0 V

Internal Connection. Connect this pin to ground.

Reference Select 0 (Input/Output). In the manual mode of operation, REF_SEL0 is an

input. As an input REF_SEL0 combined with REF_SEL1 selects the reference input that

is used for synchronization, see Table 6 on page 23.

In the Automatic mode of operation, REFSEL0 is an output indicating which of the input

references is the being selected. This pin is internally pulled down to GND.

Reference Select 1 (Input/Output). See REF_SEL0 pin description.

Reference (Input). This is one of three (REF0, REF1 and REF2) input reference sources

used for synchronization. One of five possible frequencies may be used: 8 kHz,

1.544 MHz, 2.048 MHz, 8.192 MHz or 16.384 MHz. This pin is internally pulled down to

GND.

Reference (Input). See REF0 pin description.

Zarlink Semiconductor Inc.

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