MT90840 Datasheet, PDF (1/51 Pages) Mitel Networks Corporation – Distributed Hyperchannel Switch

MT90840
Distributed Hyperchannel Switch
Data Sheet
Features
• Time slot interchange function between eight
pairs of ST-BUS/GCI/MVIP™ streams (512
channels) and parallel data port
• Programmable data rates on the parallel port
(19.44, 16.384, or 6.480 Mbyte/s)
• Programmable data rates on the serial port (2.048
Mbps, 4.096 Mbps or 8.192 Mbps)
• Supports star and point-to-point connections, and
unidirectional or bidirectional ring topologies for
distributed systems
• Input-to-output bypass function on the parallel
data port for use in add/drop applications
• Provides elastic buffer at parallel input port in the
receive direction
• Provides byte switching for up to 2430 channels
• Per-channel direction control on the serial port
side
• Per-channel message mode and high-impedance
control on both parallel and serial port sides
• 8-bit multiplexed microprocessor port compatible
with Intel and Motorola microcontrollers
• Guarantees frame integrity when switching nX64
wideband channels such as ISDN H0 channel
• Provides external control lines allowing fast
parallel interface to be shared with other devices
ISSUE 3
Ordering Information
MT90840AL 100 Pin PQFP
MT90840AP 84 Pin PLCC
-40°C to 85°C
July 2002
• Diagnostic alarm functions and clock
phase-status word for clock monitoring
• IEEE 1149 (JTAG) boundary scan port
Applications
• Bridging ST-BUS/MVIP buses to high speed
Time Division Multiplexed backplanes at
SONET rates (STS-1, STS-3)
• High speed isochronous backbones for
distributed PBX and LAN systems
• Switch platforms of up to 2430 channels with
guaranteed frame integrity for wideband
channels
• Serial bus control and monitoring
• Data multiplexing
• High speed communications interface
PDo0
PDo7
CTo0-3
PDi0
PDi7
PCKR
PCKT
RES
PPFRi
PPFTi/o
F0i/o
Output
Mux &
Drivers
4
8 ^{Multiple Pages of 512 Position}
TX Path Data Memory
16
2430 Position
TX Path
8
Connection Memory
Timing
Control
Unit
8 Multiple Pages of 2430-Byte
RX Path Data Memory
15
512 Position
RX Path
Connection Memory
CPU Interface
8 Serial
to
Parallel
&
Parallel
to
Serial
8
Conver-
ters
Bidirectional
I/O
Driver
Bidirectional
I/O
Driver
JTAG
5
Internal
Registers
88
STi0
STi7
STo0
STo7
TEST
Pins
Figure 1 - Functional Block Diagram
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