MUN5111 Datasheet, PDF (1/12 Pages) Weitron Technology – Bias Resistor Transistor PNP Silicon

DATA SHEET
SEMICONDUCTOR
Bias Resistor Transistor
PNP Silicon Surface Mount Transistor
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base–emitter
resistor. The BRT eliminates these individual components by integrating
them into a single device. The use of a BRT can reduce both system cost
and board space. The device is housed in the SC–70/SOT–323 package
which is designed for low power surface mount applications.
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• The SC–70/SOT–323 package can be soldered using wave or reflow.
The modified gull–winged leads absorb thermal stress during soldering
eliminating the possibility of damage to the die.
MUN511 Series
H
SOT–323 (SC–70)
6X M
6 X =Specific Device Code
X
=(See Marking Table)
M
=Date Code
MARKING DIAGRAM
PIN 1
R
1
BASE
(INPUT)
R
2
PIN 2
COLLECTOR
(OUTPUT)
PIN 3
EMITTER
(GROUND)
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
Collector Current
IC
100
mAdc
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Total Device Dissipation
PD
202 (Note 1)
TA = 25°C
310 (Note 2)
Derate above 25°C
1.6 (Note 1)
2.5 (Note 2)
Thermal Resistance –
RθJA
618 (Note 1)
Junction-to-Ambient
403 (Note 2)
Thermal Resistance –
RθJL
280 (Note 1)
Junction-to-Lead
332 (Note 2)
Junction and Storage
TJ, Tstg
–55 to +150
Temperature Range
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
Unit
mW
°C/W
°C/W
°C/W
°C
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