YSS902 Datasheet, PDF (9/12 Pages) YAMAHA CORPORATION – Dolby Digital (AC-3) / Pro Logic decoder + Sub DSP

YSS902
(Registermap continued)
address
Name
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
Bitstream Register 14
Bitstream Register 15
Bitstream Register 16
Bitstream Register 17
Bitstream Register 18
(not used)
Data Stream Register
Status Register
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
langcod2
compr
compr2
dynrng
dynrng2
(write disable, all “0” out when read)
STREAM7 STREAM6 STREAM5 STREAM4 STREAM3 STREAM2 STREAM1 STREAM0
0
0
2/0MODE SURENC KARAOKE MUTE
CRC NONPCM
Address 0x06 to 0x08 and 0x37 to 0x7F are assigned for TEST. Never access to these registers.
Please refer to Application manual for details of Control register.
SERIAL DATA INTERFACE
Data timing of the serial data interface is as follows.
Please refer to Application manual for details of SDIA, SDOA, SDIB, and SDOB registers.
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