YTD436 Datasheet, PDF (5/14 Pages) YAMAHA CORPORATION – ISTC ISDN BRI controller with S/T ref. pt. analog D/R

Functional Comparison of YAMAHA ISDN S/T Interface LSIs
FUNCTION
Layer 1
ITU-T Recommendation I.430
TTC Standard
JT-I430
Layer 2
(LAPD)
ITU-T Recommendation
Q.920
Q.921
TTC Standard
JT-Q920
JT-Q921
ETSI
ETS 300 012, ETS 300 125
North American Switches
National ISDN-1/2, AT&T 5ESS,
Nortel DMS-100
YTD410
1992 edition
1993 edition
1992 edition
1993 edition
S/T Reference Point Analog Driver/Receiver
Internal
Maximum D ^{Circuit Switching}
1
Channel Links Dch Packet Switching
(Teleaction Communication)
1
D Channel Layer 3 Data Transfer Method
DMA Transfer
HDLC Controller and
DMA Controller for B Channel Data
External
B Channel Data Transfer Method
–
B Channel Internal Clock Mode (kHz)
B Channel External Clock Mode
Clock Output Function for MPU
Signal Output Function for Testing
Supply Voltage (V)
Power Consumption
during Operation [typ.] (mW)
Power Consumption
during Sleep [typ.] (mW)
Package
56, 64
√
√
+5
65
2
80 pin QFP
100 pin TQFP
YM7405B
1992 edition
1993 edition
1992 edition
1993 edition
√
Internal
2
2
DMA Transfer
External
–
64
√
+5
125
30
80 pin QFP
100 pin TQFP
YTD418
1992 edition
1993 edition
1992 edition
1993 edition
√
External
[YTD421B]
2
2
DMA Transfer
External
–
64
√
+5
75
21
80 Pin QFP
YTD423
1992 edition
1993 edition
1992 edition
1993 edition
√
√
External
[YTD421B]
2
2
DMA Transfer
or
I/O Transfer
Internal
DMA Transfer
or
I/O Transfer
32, 56, 64
√
√
√
+5
85
1
100 pin SQFP
YTD436
1992 edition
1997 edition
1992 edition
1997 edition
1993 edition
1998 edition
√
√
Internal
2
2
(2)
DMA Transfer
or
I/O Transfer
Internal
DMA Transfer
or
I/O Transfer
(Note 1)
32, 56, 64
√
√
√
+5 or
+3.3
(Note 2)
75 (@+5V)
40 (@+3.3V)
less than 0.5
(Note 3)
100 pin SQFP
Note 1:
Note 2:
Note 3:
DMA Transfer: Request function only
I/O transfer: 4 byte FIFO
With respect to Digital Supply Voltage
State at Line interface disconnection + Power down (SLEEP state)
-5-