YTD436 Datasheet, PDF (12/14 Pages) YAMAHA CORPORATION – ISTC ISDN BRI controller with S/T ref. pt. analog D/R

When DVDD = 3.3 V ± 0.3 V, AVDD = 5 V ± 5 % (VDSEL=”L”, Top = - 30 to + 85 ºC)
Parameter
Symbol Condition
Min.
High-Level Input Voltage
VDIH
0.8DVDD
Low-Level Input Voltage
VDIL
High-Level Output Voltage
VDOH |IDOH| < 0.4 mA DVDD - 0.4
Low-Level Output Voltage
VDOL |IDOL| < 1.2 mA
Low-Level Output Voltage (Open-D) VDOL
(Note 1)
Leakage Current
IL
-10
Off-State Leakage Current
ILZ
(Note 2)
-10
Power Supply Current (Digital block)
DIDD
(Note 3)
(Note 4, 6)
(Note 3, 7)
Power Supply Current (Analog block)
AIDD
(Note 4, 7)
(Note 5, 7)
Typ.
4.9
0.1
4.8
0.4
0.1
Max.
0.2DVDD
DVSS + 0.4
0.4
10
10
Units
V
V
V
V
V
µA
µA
mA
mA
mA
mA
mA
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Note 1: HTD, LTD, INT, INF1 pin Test condition : IDOL = 1.2 mA
RBHW pin
Test condition : RL = 500 Ω
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Note 2: With respect to cases in which D0 - D15, and A0 - A15 pins are in the input state and MWR and
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MRD pins are in Hi-Z state.
Note 3: RUN state (connecting with a B channel, transferring all “0”, SYSCLK = 8 MHz, using internal
driver/receiver, assuming as VDIH = DVDD, VDIL = DVSS )
Note 4: SLEEP state
Note 5: SLEEP state + Line interface disconnection
Note 6: When SYSCLK is stopped.
Note 7: When using internal driver/receiver
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