YMU757B Datasheet, PDF (36/43 Pages) YAMAHA CORPORATION – MA-1C

YMU757B
4. AC characteristics
Input ViH=0.8×Vdd, ViL=0.1×Vdd as input signal. Measure timing at ViH=0.7×Vdd, ViL=0.2×Vdd.
4-1. CLK_I ,Reset
Parameter
Symbol
Min.
Typ.
Max.
Unit
CLK_I clock cycle period
Tcclk_period
35.8
CLK_I "L" pulse width
Tcclk_low
12
CLK_I "H" pulse width
Tcclk_high
12
/RST active "L" pulse width
Trst_low
100
SCLK start delay time
(after /RST inactive)
Trst2clk
64
ns
ns
ns
× CLK_I
× CLK_I
Note) T_OP=-20~85°C, DV_DD=3.0±0.3V, Capacitor load=50pF
X CLK_I means the number of clocks inputted through the CLK_I terminal.
CLK_I Duty
CLK_I
Tcclk_high
Tcclk_period
Tcclk_low
0.8×Vdd
0.7×Vdd
0.2×Vdd
0.1×Vdd
Hardware Reset
/RST
SCLK
Trst_low
Trst2clk
VIL
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