YSS944 Datasheet, PDF (30/34 Pages) YAMAHA CORPORATION – ADAMB Advanced Digital Audio Multi channel decode processor

YSS944/943/940
(d)External memory interface
When EM_CYC = c, EM_WEH = w, and EM_OEH = o, the timing is as described below.
1) Read
No.
Parameter
Symbol Condition Min.
1 Read cycle time
t_RCYC CL = 20 pF
2 Address access time
t_AA CL = 20 pF
3 nMEMOE access time t_EAC CL = 20 pF
4 Data setup time
t_DSR
25
5 Data hold time
t_DHR
0
6 Address setup time
t_ASR CL = 20 pF
7 Address hold time
t_AHR CL = 20 pF
8 nMEMOE pulse width t_REP CL = 20 pF
Typ.
Max.
Unit
t_ASR+t_REP+t_AHR
ns
T_CLK×(2c+3)-25 ns
T_CLK×(2c+2)-25 ns
ns
ns
T_CLK×1
ns
T_CLK×(2^o+1)
ns
T_CLK×(2c+2)
ns
MEMA18-0
nMEMCE
nMEMOE
nMEMWE
MEMD7-0
1
6
8
7
3
2
45
Read
Data
30