YSS944 Datasheet, PDF (17/34 Pages) YAMAHA CORPORATION – ADAMB Advanced Digital Audio Multi channel decode processor

YSS944/943/940
„ Audio Interface
Input and output of digital audio data is performed via two interfaces:
• SDI (serial data input) interface
• SDO (serial data output) interface
(1) SDI interface format
The following serial data input format is supported via register settings.
Regardless of the register setting, the input signals for SDI3 to SDI0 are always handled as fixed-point 24-bit
data.
SDIWCK
SDIWP = 0
SDIWP = 1
１ frame （IEC60958 Frame）
L ch
R ch
SDIBCK
SDIBP = 0
SDIBP = 1
SDIFMT[1:0]=00
SDIBIT[1:0]=XX
M
SDIFMT[1:0]=1X
SDIBIT[1:0]=XX
M
32 clock cycles
24 clock cycles
L
24 bits
L
32 clock cycles
24 clock cycles
M
L
24 bits
M
L
SDIFMT[1:0]=01
SDI3
SDIBIT[1:0]=00
L
M
87
L
M
87
to
SDIFMT[1:0]=01
L
M
65
L
M
65
SDI0
SDIBIT[1:0]=01
SDIFMT[1:0]=01
SDIBIT[1:0]=10
L
M
43 L
M
43
SDIFMT[1:0]=01
SDIBIT[1:0]=11
M
L
M
L
M : MSB DATA L : LSB DATA
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