EN026 Datasheet, PDF (2/3 Pages) Xilinx, Inc – Spartan-3E XC3S500E FPGA Errata

Spartan-3E XC3S500E FPGA Errata
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Table 2: Affected Pins
Package
A20
A21
A22
A23
CP(G)132
M10
N10
M9
N9
PQ(G)208
P97
P96
P94
P93
FT(G)256
N12
P12
P11
R11
FG(G)320
R14
T14
R13
P13
This issue affects all Spartan-3E part/package combinations that support A20-A23. This issue does not affect the
XC3S100E device, or the VQ(G)100 and TQ(G)144 packages.
Workaround
Customers who use the Persist option in the Bitstream Generator and who use a parallel configuration mode must
not use the affected I/O pins in the design. No I/O should be placed on these pins by the user, and the pins need to
be prohibited for the tools by using the Prohibit constraint on each pin. This constraint can be specified in the User
Constraints File (UCF) with the following syntax:
CONFIG PROHIBIT=M10,N10,M9,N9;
Alternatively, consider not using Persist if post-configuration Readback is not required.
These pins will be added to the list of pins that Persist in the documentation. In ISE software version 10.1 and later,
an error message will be provided by the bitstream generator if Persist is used and the design uses these four pins.
Additional Questions or Clarifications
All other device functionality and timing meet the data sheet specifications. For questions, please contact Xilinx Technical
Support http://www.xilinx.com/support/clearexpress/websupport.htm or your Xilinx sales representative,
http://www.xilinx.com/company/contact.htm.
Obtaining Errata Notification Updates
If this document is printed or saved locally, please check for the most recent release, available to registered users on the
Xilinx web site at http://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp?category=Errata. To receive an e-mail alert
when this document changes, sign up at http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=18815.
Applicable Documents
These errata apply to the following XC3S500E documents:
• DS312: Spartan^TM-3E FPGA Family Data Sheet
www.xilinx.com/bvdocs/publications/ds312.pdf
• UG331: Spartan-3 Generation FPGA User Guide
www.xilinx.com/bvdocs/userguides/ug331.pdf
• UG332: Spartan-3 Generation Configuration User Guide
www.xilinx.com/bvdocs/userguides/ug332.pdf
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EN026 (v1.3) October 19, 2007
Errata Notice