X25041 Datasheet, PDF (5/14 Pages) Xicor Inc. – SPI Serial E2PROM with Block LockTM Protection

X25041
Operational Notes
The X25041 powers-up in the following state:
• The device is in the low power standby state.
• A HIGH to LOW transition on CS is required to
enter an active state and receive an instruction.
• SO pin is high impedance.
• The “write enable” latch is reset.
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
• The “write enable” latch is reset upon power-up.
• A WREN instruction must be issued to set the “write
enable” latch.
• CS must come HIGH at the proper clock count in
order to start a write cycle.
Figure 1. Read E²PROM Array Operation Sequence
CS
SCK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
INSTRUCTION
BYTE ADDRESS
SI
8
76 5 4 3 2 1 0
9TH BIT OF ADDRESS
HIGH IMPEDANCE
SO
DATA OUT
76543210
MSB
6556 FHD F14.1
Figure 2. Read Status Register Operation Sequence
CS
SCK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
INSTRUCTION
SI
HIGH IMPEDANCE
SO
76
MSB
DATA OUT
5432
10
6556 ILL F13
5