X88C64 Datasheet, PDF (2/14 Pages) Xicor Inc. – E2 Micro-Peripheral

X88C64
PIN DESCRIPTIONS
Address/Data (A/D₀–A/D₇)
Multiplexed low-order addresses and data. The Ad-
dresses flow into the device while ALE is HIGH. After
ALE transitions from a HIGH to LOW the addresses
are latched. Once the addresses are latched these
pins input data or output data depending on RD, WR,
PSEN, and CE.
Addresses (A₈–A₁₂)
High order addresses flow into the device when ALE
is HIGH and are latched when ALE goes LOW.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all
read/write operations. When CE is HIGH and ALE is
LOW, the X88C64 is placed in the low power standby
mode.
Program Store Enable (PSEN)
When the X88C64 is to be used in a 8051 based
system, PSEN is tied directly to the microcontroller’s
PSEN output.
Read (RD)
When the X88C64 is to be used in a 8051 based
system, RD is tied directly to the microcontroller’s RD
output.
Write (WR)
When the X88C64 is to be used in a 8051 based
system, WR is tied directly to the microcontroller’s
WR output.
Address Latch Enable (ALE)
Addresses flow through the latches to address de-
coders when ALE is HIGH and are latched when ALE
transitions from a HIGH to LOW.
Write Control (WC)
The Write Control allows external circuitry to abort a
page load cycle once it has been initiated. This input
is useful in applications in which a power failure or
processor RESET could interrupt a page load cycle.
In this case, the microcontroller might drive all signals
HIGH, causing bad data to be latched into the
E²PROM. If the Write Control input is driven HIGH
(before t_BLC Max) after Write (WR) goes HIGH, the
write cycle will be aborted.
When WC is LOW (tied to V_SS) the X88C64 will be
enabled to perform write operations. When WC is
HIGH normal read operations may be performed, but
all attempts to write to the device will be disabled.
PIN CONFIGURATION
NC
A12
NC
NC
WC
PSEN
A/D0
A/D1
A/D2
A/D3
A/D4
VSS
DIP/SOIC
1
24
2
23
3
22
4
21
5
20
6
19
X88C64
7
18
8
17
9
16
10
15
11
14
12
13
VCC
WR
ALE
A8
A9
A11
RD
A10
CE
A/D7
A/D6
A/D5
3867 FHD F01
PIN NAMES
Symbol
ALE
A/D0–A/D7
A8–A12
RD
WR
PSEN
CE
WC
VSS
V_CC
NC
Description
Address Latch Enable
Address Inputs/Data I/O
Address Inputs
Read Input
Write Input
Program Store Enable Input
Chip Enable
Write Control
Ground
Supply Voltage
No Connect
3867 PGM T01.1
2