English
Language : 

X88C64 Datasheet, PDF (1/14 Pages) Xicor Inc. – E2 Micro-Peripheral
APPLICATION NOTE
AVA I L A B L E
AN63
8X08581CM64icrocontroller Family Compatible
SLIC
64K
X88C64
E2 Micro-Peripheral
8192 x 8 Bit
FEATURES
• CONCURRENT READ WRITE™
—Dual Plane Architecture
—Isolates Read/Write Functions
Between Planes
—Allows Continuous Execution of Code
From One Plane While Writing in
the Other Plane
• Multiplexed Address/Data Bus
—Direct Interface to Popular 8051 Family
• High Performance CMOS
—Fast Access Time, 120ns
—Low Power
—60mA Active Maximum
—500µA Standby Maximum
• Software Data Protection
• Block Protect Register
—Individually Set Write Lock Out in 1K Blocks
• Toggle Bit Polling
—Early End of Write Detection
• Page Mode Write
—Allows up to 32 Bytes to be Written in
One Write Cycle
• High Reliability
—Endurance: 100,000 Write Cycle
—Data Retention: 100 Years
DESCRIPTION
The X88C64 is an 8K x 8 E2PROM fabricated with
advanced CMOS Textured Poly Floating Gate Tech-
nology. The X88C64 features a Multiplexed Address
and Data bus allowing a direct interface to a variety of
popular single-chip microcontrollers operating in ex-
panded multiplexed mode without the need for addi-
tional interface circuitry.
The X88C64 is internally configured as two indepen-
dent 4K x 8 memory arrays. This feature provides the
ability to perform nonvolatile memory updates in one
array and continue operation out of code stored in the
other array; effectively eliminating the need for an
auxiliary memory device for code storage.
To write to the X88C64, a three-byte command
sequence must precede the byte(s) being written. The
X88C64 also provides a second generation software
data protection scheme called Block Protect. Block
Protect can provide write lockout of the entire device
or selected 1K blocks. There are eight 1K x 8 blocks
that can be write protected individually in any combi-
nation required by the user. Block Protect, in addition
to Write Control input, allows the different segments
of the memory to have varying degrees of alterability
in normal system operation.
FUNCTIONAL DIAGRAM
CE
WR
RD
PSEN
A8–A11
ALE
CONTROL
LOGIC
L
X
A
D
T
E
C
C
H
O
E
D
S
E
WC
A12
SOFTWARE
DATA
PROTECT
A12
1K BYTES A12 1K BYTES
M
1K BYTES
1K BYTES
U
1K BYTES
X
1K BYTES
1K BYTES
1K BYTES
Y DECODE
CONCURRENT READ WRITE™ is a trademark of Xicor, Inc.
© Xicor, Inc. 1994, 1995, 1996 Patents Pending
3867-1.5 7/9/96 T0/C2/D0 NS
I/O & ADDRESS LATCHES AND BUFFERS
A/D0–A/D7
3867 FHD F02
1
Characteristics subject to change without notice