X84256 Datasheet, PDF (2/15 Pages) Xicor Inc. – UPort Saver EEPROM

X84256
Preliminary
PIN CONFIGURATIONS
Drawings are to the same scale, actual package sizes are
shown in inches:
8-LEAD SOIC
CE 1
8
I/O ₂
7
WP ₃
6
V_{SS 4}
5
V_CC
NC
OE
WE
CE
I/O
NC
NC
NC
WP
VSS
14-LEAD TSSOP
1
14
2
13
3
12
4
11
5
10
6
9
7
8
V _CC
NC
NC
NC
NC
OE
WE
8-LEAD XBGA
V_CC 1
8 ^I/O
NC _{2 X84256 7 CE}
WE ₃
6 V_SS
OE ⁴
5 _WP
16-LEAD SOIC
CE
1
16
I/O 2
15
NC ₃
14
NC ₄
13
NC 5
12
NC 6
11
WP 7
10
VSS
8
9
V _CC
NC
NC
NC
NC
NC
OE
WE
PIN NAMES
I/O
Data Input/Output
CE
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
WP
Write Protect Input
V_CC
Supply Voltage
V_SS
Ground
NC
No Connect
PIN DESCRIPTIONS
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, the chip is dese-
lected, the I/O pin is in the high impedance state, and
unless a nonvolatile write operation is underway, the
device is in the standby power mode.
Output Enable (OE)
The Output Enable input must be LOW to enable the out-
put buffer and to read data from the device on the I/O line.
Write Enable (WE)
The Write Enable input must be LOW to write either data
or command sequences to the device.
Data In/Data Out (I/O)
Data and command sequences are serially written to or
serially read from the device through the I/O pin.
Write Protect (WP)
When the Write Protect input is LOW, nonvolatile writes to
the device are disabled. When WP is HIGH, all functions,
including nonvolatile writes, operate normally. If a nonvol-
atile write cycle is in progress, WP going LOW will have
no effect on the cycle already underway, but will inhibit
any additional nonvolatile write cycles.
DEVICE OPERATION
The X84256 serial EEPROM is designed to interface
directly with most microprocessor buses. Standard CE,
OE, and WE signals control the read and write opera-
tions, and a single l/O line is used to send and receive
data and commands serially.
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