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X4283 Datasheet, PDF (16/22 Pages) Xicor Inc. – CPU Supervisor with 128K EEPROM
X4283/85 – Preliminary Information
TIMING DIAGRAMS
Bus Timing
tF
SCL
tSU:STA
SDA IN
tHD:STA
tHIGH
tLOW
tSU:DAT
tHD:DAT
SDA OUT
tR
tAA tDH
tSU:STO
tBUF
WP Pin Timing
SCL
SDA IN
WP
START
tSU:WP
Clk 1
Slave Address Byte
Clk 9
tHD:WP
Write Cycle Timing
SCL
SDA
8th Bit of Last Byte
ACK
tWC
Stop
Condition
Start
Condition
Nonvolatile Write Cycle Timing
Symbol
tWC(1)
Parameter
Write Cycle Time
Min.
Typ.(1)
5
Max.
10
Unit
ms
Note: (1) tWC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
REV 1.17 11/27/00
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Characteristics subject to change without notice. 16 of 22