X1240 Datasheet, PDF (14/19 Pages) Xicor Inc. – Real Time Clock/Calendar with EEPROM

X1240
(3) The device goes into the Timekeeping state 200nS after any stop, except those that initiate a non-volatile write cycle; t_WC after a
stop that initiates a non-volatile write cycle; or 9 clock cycles after any start that is not followed by the correct Device Select Bits in
the Slave Address Byte.
(4) For reference only and not tested.
(5) V_IL = V_CC x 0.1, V_IH = V_CC x 0.9, f_SCL = 400KHz, SDA = Open
(6) V_IL = V_CC x 0.1, V_IH = V_CC x 0.9, f_SCL = 400KHz, f_SDA = 400KHz, Vcc = 1.22 x Vcc Min
(7) V_CC = 0V.
(8) V_BACK= 0V.
(9) V_SDA=V_SCL=V_CC, Others=GND or V_CC
(10) V_SDA=V_SCL=V_BACK, Others=GND or V_BACK
(11) V_SDA = GND to V_CC, V_CLK = GND or V_CC
(12) I_OL = 3.0mA at 5V, 1.5mA at 2.7V
(13) I_OH = -1.0mA at 5V, -0.4mA at 2.7V
(14) Threshold voltages based on the higher of Vcc or Vback.
(15) Driven by external 32.768KHz square wave oscillator on X1, X2 open.
(16) Using recommended crystal and oscillator network applied to X1 and X2 (25°C).
(17) Periodically sampled and not 100% tested.
CAPACITANCE (T_A = 25˚C, f = 1.0 MHz, V_CC = 5V)
Symbol
C_OUT
(Notes:)
Parameter
Output Capacitance (SDA)
C_IN ^(Notes:)
Input Capacitance (SCL)
Notes: (1) This parameter is periodically sampled and not 100% tested.
Max
8
6
Units
pF
pF
Test Conditions
V_OUT = 0V
V_IN = 0V
AC CHARACTERISTICS
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing
Levels
Output Load
V_CC x 0.1 to V_CC x 0.9
10ns
V_CC x 0.5
Standard Output Load
EQUIVALENT AC OUTPUT LOAD CIRCUIT FOR
V_CC = 5V (Standard Output Load for testing the device
with V_CC = 5.0V)
5.0V
SDA
1533Ω
For V_OL= 0.4V
and I_OL = 3 mA
100pF
14