X24F128 Datasheet, PDF (10/16 Pages) Xicor Inc. – 2-Wire SerialFlash with Block Lock TM Protection

X24F128
Programming to the BL and PPEN Bits
A 3 step sequence is required to change the nonvola-
tile Block Lock Protect or Program Protect Enable bits:
1) Set PEL=1, Program 00000010 to address FFFFh
(Volatile Write Cycle.)
2) Set RPEL=1, Program 00000110 to address FFFFh
(Volatile Write Cycle.)
3) Set BL1, BL0, and/or PPEN bits, Program
u00xy010 to address FFFFh, where u=PPEN, x=BL1,
and y=BL0. (Nonvolatile Write Cycle.)
The three step sequence was created to make it diffi-
cult to change the contents of the Program Protect
Register accidentally. If PEL was set to one by a
previous register program operation, the user may
start at step 2. RPEL is reset to zero in step 3 so that
user is required to perform steps 2 and 3 to make
another change. RPEL must be 0 in step 3. If the
RPEL bit in the data byte for step 3 is a one, then no
changes are made to the Program Protect Register
and the device remains at step 2.
The PP pin must be LOW or the PPEN bit must be
LOW before a nonvolatile register program operation
is initiated. Otherwise, the program operation will abort
and the device will go into standby mode after the
master issues the stop condition in step 3.
Step 3 is a nonvolatile write operation, requiring 10mS
max to complete (acknowledge polling may be used to
reduce this time requirement). It should be noted that
step 3 MUST end with a stop condition. If a start
condition is issued during or at the end of step 3
(instead of a stop condition) the device will abort the
nonvolatile register program and remain at step 2. If
the operation is aborted with a start condition, the
master must issue a stop to put the device into
standby mode.
Figure 10. Block Lock Protect Bits and Protected Addresses
BL1
BL0
Protected Addresses
X24F128
Array Location
0
0
0
1
1
0
1
1
None
3000h - 3FFFh
2000h - 3FFFh
0000h - 3FFFh
Figure 11. PP Pin and PPEN Bit Functionality
No Protect
Upper 1/4
Upper 1/2
Full Array
7012 FRM T02
PP
PPEN
Memory Array Not Memory Array Block
Lock Block Protected
Lock Protected
Block Lock Bits
PPEN
Bit
0
X
X
0
Programmable
Programmable
Protected
Protected
Programmable
Programmable
Programmable
Programmable
1
1
Programmable
Protected
Protected
Protected
7012 FRM T03
10