WM8259 Datasheet, PDF (8/26 Pages) Wolfson Microelectronics plc – Single Channel 16-bit CIS/CCD AFE with 4-bit Wide Output

WM8259
INPUT VIDEO SAMPLING
t
PER
t
t
MCLKH MCLKL
MCLK
VSMP
INPUT
VIDEO
t
VSMPSU
t
VSMPH
t
t
VSU
VH
Production Data
t
VPER
t
t
RSU
RH
Figure 1 Input Video Timing
Note:
1. See Page 15 (Programmable VSMP Detect Circuit) for video sampling description.
Test Conditions
AVDD = DVDD1 = DVDD2 = 3.3V, AGND = DGND = 0V, TA = 25°C, MCLK = 18MHz unless otherwise stated.
PARAMETER
MCLK period
SYMBOL
tPER
TEST CONDITIONS
MIN
55.5
MCLK high period
tMCLKH
25
MCLK low period
tMCLKL
25
VSMP period
tVPER
300
VSMP set-up time
tVSMPSU
6
VSMP hold time
tVSMPH
3
Video level set-up time
tVSU
10
Video level hold time
tVH
3
Reset level set-up time
tRSU
10
Reset level hold time
tRH
3
Notes:
1.
tVSU and tRSU denote the set-up time required after the input video signal has settled.
2.
Parameters are measured at 50% of the rising/falling edge.
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
w
PD Rev 4.2 April 2007
8