WM8259 Datasheet, PDF (6/26 Pages) Wolfson Microelectronics plc – Single Channel 16-bit CIS/CCD AFE with 4-bit Wide Output

WM8259
Production Data
ELECTRICAL CHARACTERISTICS
Test Conditions
AVDD = DVDD1 = DVDD2 = 3.3V, AGND = DGND = 0V, TA = 25°C, MCLK = 18MHz, mode 1 unless otherwise stated.
PARAMETER
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
Overall System Specification (including 16-bit ADC, PGA, Offset and CDS functions)
Full-scale input voltage range
(see Note 1)
Max Gain
0.25
Min Gain
2.56
Input signal limits (see Note 2)
VIN
0
AVDD
Full-scale transition error
Gain = 0dB;
-50
10
+50
PGA[7:0] = 07(hex)
Zero-scale transition error
Gain = 0dB;
-50
10
+50
PGA[7:0] = 07(hex)
Differential non-linearity
DNL
1.25
Integral non-linearity
INL
24
Input referred noise
13
References
Upper reference voltage
VRT
2.05
Lower reference voltage
VRB
1.05
Diff. reference voltage (VRT-VRB)
Output resistance VRT, VRB, VRX
VRTB
0.95
1.0
1.05
1
VRLC/Reset-Level Clamp (RLC)
RLC switching impedance
20
60
100
VRLC short-circuit current
1.6
2
4.5
VRLC output resistance
2
VRLC Hi-Z leakage current
VRLC = 0 to AVDD
1
RLCDAC resolution
4
RLCDAC step size
VRLCSTEP
RLCDACRNG = 0
RLCDACRNG = 1
0.18
0.123
RLCDAC output voltage at
VRLCBOT
RLCDACRNG = 0
0.3
code 0(hex)
RLCDACRNG = 1
0.2
RLCDAC output voltage at
code F(hex)
VRLCTOP
RLCDACRNG = 0
RLCDACRNG = 1
3.0
2.05
Offset DAC, Monotonicity Guaranteed
Resolution
8
Differential non-linearity
DNL
0.2
Integral non-linearity
INL
0.6
Step size
2.03
Output voltage
Code 00(hex)
Code FF(hex)
-260
+260
Notes:
1.
Full-scale input voltage denotes the peak input signal amplitude that can be gained to match the ADC input
range.
2.
Input signal limits are the limits within which the full-scale input voltage signal must lie.
UNIT
Vp-p
Vp-p
V
mV
mV
LSB
LSB
LSB rms
V
V
V
Ω
Ω
mA
Ω
µA
bits
V/step
V/step
V
V
V
V
bits
LSB
LSB
mV/step
mV
mV
w
PD Rev 4.2 April 2007
6