WM8150_05 Datasheet, PDF (8/26 Pages) Wolfson Microelectronics plc – Single Channel 12-bit CIS/CCD AFE with 4-bit Wide Output

WM8150
INPUT VIDEO SAMPLING
t_PER
t_MCLKH t_MCLKL
MCLK
VSMP
INPUT
t_VSMPSU
t_VSMPH
t_VSU
t_VH
VIDEO
Production Data
t_RSU
t_RH
Figure 1 Input Video Timing
Note:
1. See Page 15 (Programmable VSMP Detect Circuit) for video sampling description.
Test Conditions
VDD = 5.0V, DVDD = 3.3V, AGND = DGND = 0V, TA = 25°C, MCLK = 16MHz unless otherwise stated.
PARAMETER
MCLK period
SYMBOL
tPER
TEST CONDITIONS
MIN
62.5
MCLK high period
tMCLKH
28.1
MCLK low period
tMCLKL
28.1
VSMP set-up time
tVSMPSU
8
VSMP hold time
tVSMPH
4
Video level set-up time
tVSU
15
Video level hold time
tVH
5
Reset level set-up time
tRSU
15
Reset level hold time
tRH
5
Notes:
1.
tVSU and tRSU denote the set-up time required after the input video signal has settled.
2.
Parameters are measured at 50% of the rising/falling edge.
TYP
OUTPUT DATA TIMING
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
MCLK
OP[3:0]
t_PD
t_PD
Figure 2 Output Data Timing
Test Conditions
VDD = 5.0V, DVDD = 3.3V, AGND = DGND = 0V, TA = 25°C, MCLK = 16MHz unless otherwise stated.
PARAMETER
Output propagation delay
SYMBOL
TEST CONDITIONS
MIN
tPD
IOH = 1mA, IOL = 1mA
TYP
MAX
30
UNITS
ns
w
PD Rev 4.1 February 2005
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