WM8753 Datasheet, PDF (73/87 Pages) Wolfson Microelectronics plc – HI FI AND TELEPHONY DUAL CODEC

WM8753L
Advanced Information
REGISTER
ADDRESS
R61 (3Dh)
Bias control
Table 71 Bias Control Bits
BIT
LABEL
8
VDACBIASX0P5
7
MBIASBOOST
[6:5] MICBIASBST
[1:0]
[4:3] BUFBIAS[1:0]
2
IPBIASX0P5
[1:0] ADCBIAS[1:0]
DEFAULT
DESCRIPTION
0
Voice DAC bias current reduce:
0 = 1x bias
1 = 0.5x bias (reduced power)
0
Master bias current boost
0 = 1x bias
1 = 1.5x bias (increased power)
00
Microphone preamplifier current boost:
00 = 1x bias
01 = 2x bias
10 = 3x bias
11 = 4x bias
00
ADC sample and hold buffer bias
control:
00 = 1x bias
01 = 0.25x bias (lowest power)
10 = 0.5x bias (reduced power)
11 = 1.5x bias (increased power)
0
ADC volume control (PGA) and
ADCINV bias reduce:
0 = 1x bias
1 = 0.5x bias (reduced power)
00
ADC bias current reduce:
00 = 1x bias
01 = 0.25x bias (lowest power)
10 = 0.5x bias (reduced power)
11 = 1.5x bias (increased power)
REGISTER BIT
ADDRESS
LABEL
DEFAULT
DESCRIPTION
R63 (3Fh)
Additional
control
1
OPBIASX0P5 0
Analogue Output bias current control:
0 = 1x bias
1 = 0.5x bias (reduced power)
0
DMBIAS0P5 0
DAC and Mixer bias current control:
0 = 1x bias
1 = 0.5x bias (reduced power)
Table 72 Additional Control Register – Bias Control Bits
w
AI Rev 3.1 June 2004
73