WM8753 Datasheet, PDF (39/87 Pages) Wolfson Microelectronics plc – HI FI AND TELEPHONY DUAL CODEC

WM8753L
Advanced Information
REGISTER
ADDRESS
R1 (01h)
DAC Control
Table 28 HiFi DAC Control
BIT
LABEL
DEFAULT
DESCRIPTION
2:1 DEEMP
00
[1:0]
3 DACMU
1
De-emphasis Control
11 = 48kHz sample rate
10 = 44.1kHz sample rate
01 = 32kHz sample rate
00 = No De-emphasis
Digital Soft Mute
1 = mute
0 = no mute (signal active)
The digital audio data is converted to oversampled bit streams in the on-chip, true 24-bit digital
interpolation filters. The bitstream data enters two multi-bit, sigma-delta DACs, which convert them to
high quality analogue audio signals. The multi-bit DAC architecture reduces high frequency noise and
sensitivity to clock jitter. It also uses a Dynamic Element Matching technique for high linearity and low
distortion.
In normal operation, the left and right channel digital audio data is converted to analogue in two
separate DACs. There is also a mono-mix mode where the two audio channels are mixed together
digitally, controlled by the DMONOMIX register bits which allow the digital mono mix to be applied to
left, right or both DAC channels. If only one DAC channel is being used for the mono mix the other
can be powered down.
The DAC output defaults to non-inverted. Setting DACINV will invert the DAC output phase on both
left and right channels.
REGISTER
ADDRESS
R1 (01h)
DAC Control
BIT
LABEL
5:4 DMONOMIX
[1:0]
6 DACINV
Table 29 HiFi DAC Mono Mix and Phase Invert Select
DEFAULT
DESCRIPTION
00
DAC Mono Mix
00: stereo
01: mono ((L+R)/2) into DACL, ‘0’ into
DACR
10: mono ((L+R)/2) into DACR, ‘0’ into
DACL
11: mono ((L+R)/2) into DACL and
DACR
0
DAC Phase Invert
0 : non-inverted
1 : inverted
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AI Rev 3.1 June 2004
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