WM8593_07 Datasheet, PDF (73/98 Pages) Wolfson Microelectronics plc – 24-bit 192kHz 2Vrms Multi-Channel CODEC

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WM8593
R26 (1Ah) – PGA Control Register 2 (PGA_CTRL2)
Bit #
15
14
13
Read
0
0
0
Write
N/A
N/A
N/A
Default
0
0
0
12
JD_PGA3R_
MUTE
0
11
JD_PGA3L_
MUTE
0
10
JD_PGA2R_
MUTE
0
9
JD_PGA2L_
MUTE
0
8
JD_PGA1R_
MUTE
0
Bit #
Read
Write
Default
7
JD_PGA1L_
MUTE
0
Function
MUTE_ALL
VOUT1L_MUTE
VOUT1R_MUTE
VOUT2L_MUTE
VOUT2R_MUTE
VOUT3L_MUTE
VOUT3R_MUTE
JD_PGA1L_MUTE
JD_PGA1R_MUTE
JD_PGA2L_MUTE
JD_PGA2R_MUTE
JD_PGA3L_MUTE
JD_PGA3R_MUTE
6
VOUT3R_
MUTE
1
5
VOUT3L_
MUTE
1
4
VOUT2R_
MUTE
1
Master Output Driver Mute Control
0 = Unmute all output drivers
1 = Mute all output drivers
Individual Output Drivers Mute Control
0 = Unmute output driver
1 = Mute output driver
3
2
1
0
VOUT2L_
MUTE
VOUT1R_
MUTE
VOUT1L_
MUTE
MUTE_ALL
1
1
1
0
N/A = Not Applicable (no function implemented)
Description
Jack Detect Mute Control
0 = Do not mute PGA when jack is detected
1 = Mute PGA when jack is detected
Figure 44 R26 – PGA Control Register 2
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PP Rev 1.0 January 2007
73