WM8737 Datasheet, PDF (7/38 Pages) Wolfson Microelectronics plc – STEREO ADC WITH MICROPHONE PREAMPLIFIER

Preliminary Technical Data
WM8737L
Test Conditions
DCVDD = 1.5V, AVDD = MVDD = 3.3V, TA = +25^oC, 1kHz -0.5dBFS signal, Normal Power Mode, fs = 48kHz, PGA gain = 0dB,
24-bit audio data, unless otherwise stated.
PARAMETER
SYMBOL TEST CONDITIONS
MIN
TYP
MAX
UNIT
Line Inputs (LINPUT1/2/3, RINPUT1/2/3) to ADC – MIC pre-amp BYPASSED
Full Scale Input Signal Level
AVDD = 3.3V
1.0
V rms
(for ADC 0dB Input at 0dB Gain)
AVDD = 1.8V
0.545
Signal to Noise Ratio
SNR
AVDD = 3.3V,
90
97
dB
(A-weighted)
Normal Power Mode
(Note 1)
AVDD = 2.7V,
95
Normal Power Mode
AVDD = 1.8V,
92
Normal Power Mode
AVDD = 3.3V,
95
Low Power Mode
AVDD = 2.7V,
93
Low Power Mode
AVDD = 1.8V,
90
Low Power Mode
Dynamic Range
DNR
-60dBFS,
90
97
dB
(A-weighted)
Normal Power Mode
(Note 2)
-60dBFS,
95
Low Power Mode
Total Harmonic Distortion
THD
-1dB input
-86 (0.007%)
dB
(Note 3)
-1dB input,
%
AVDD=1.8V
-81 (0.009%)
ADC Channel Separation
1kHz signal
105
dB
(Note 4)
Channel Matching
1kHz signal
0.2
dB
Programmable Gain Amplifier (PGA)
Programmable Gain
-97
0
30
dB
Programmable Gain Step Size
Monotonic
0.5
dB
Gain Error (Deviation from ideal
0.5dB/step gain characteristic)
1kHz signal
-0.2
0.2
dB
Input Resistance
0dB gain
30
kΩ
30dB gain
1.9
Input Capacitance
16.9pF
pF
Automatic Level Control (ALC)
Typical Record Level
-18
-3
dB
Gain Hold Time (Note 5)
Gain Ramp-Up (Decay) Time
(Notes 6, 7)
tHLD
0, 2.67, 5.33, 10.67, … , 43691
ms
MCLK = 12.288MHz
(time doubles with each step)
tDCY
(Note 3)
33.6, 67.2, 134.4, … , 3441
ms
(time doubles with each step)
Gain Ramp-Down (Attack) Time
tATK
(Notes 6, 7)
8.4, 16.8, 33.6, … , 8600
ms
(time doubles with each step)
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AI Rev 3.0 May 2004
7