WM8737 Datasheet, PDF (32/38 Pages) Wolfson Microelectronics plc – STEREO ADC WITH MICROPHONE PREAMPLIFIER

WM8737L
Preliminary Technical Data
Standby mode 1 is achieved by powering down everything except the VMID source and gives a very
low power sleep mode. Wake-up may require a few milliseconds to ensure that the VREF voltage
has stabilized.
Standby mode 2 is achieved by not powering down VMID and VREF. The WM8737L can awaken
instantly from standby mode 2 because VREF is already stable.
REGISTER BIT
ADDRESS
LABEL DEFAULT
R6 (06h)
8
VMID
0
Power
7
VREF
0
Manageme ₆
AI
0
nt
5
PGL
0
4
PGR
0
3
ADL
0
2
ADR
0
1:0 MICBIAS 00
R2 (02h)
4
LMBE
0
R3 (03h)
4
RMBE
0
Notes: All control bits are 0=OFF, 1=ON
Table 20 Power Management
DESCRIPTION
VMID (necessary for all other functions)
VREF (necessary for all other functions)
Audio Interface
PGA Left
PGA Right
ADC Left
ADC Right
see “Microphone Bias” section
Mic Boost Left (see “Input Signal Path”)
Mic Boost Right (see “Input Signal Path”)
REGISTER MAP
REGISTER
R0 (00h)
R1 (01h)
R2 (02h)
R3 (03h)
R4 (04h)
R5 (05h)
R6 (06h)
R7 (07h)
R8 (08h)
R9 (09h)
R10 (0Ah)
R11 (0Bh)
R12 (0Ch)
R13 (0Dh)
R14 (0Eh)
R15 (0Fh)
ADDRESS REMARKS
(BIT 15 – 9)
0000000 Left PGA
0000001 Right PGA
0000010 Audio Path L
0000011 Audio Path R
0001011 3D Enhance
0000101 ADC Control
0000110
0000111
0001000
Power Mgmt
Audio Format
Clocking
0001001
0001010
Mic Preamp
Control
Misc. biases
control
0000100
0001100
0001101
0001110
0001111
Noise Gate
ALC1
ALC2
ALC3
Reset
BIT8 BIT7
BIT6
BIT5 BIT4 BIT3 BIT2
BIT1
BIT0
LVU
RVU
LINSEL
RINSEL
0
DIV2
MONOMIX
VMID
0
0
0
VREF
SDODIS
AUTO
DETECT
0
LMICBOOST
RMICBOOST
3DLC 3DUC
POLARITY
AI
MS
CLK
DIV2
0
PGL
0
0
LINVOL [7:0]
RINVOL [7:0]
LMBE LMZC LPZC
LZCTO[1:0]
RMBE RMZC RPZC
RZCTO[1:0]
3DDEPTH
3DE
HPOR
0
LP MONOUT ADC
HPD
PGR ADL ADR
MICBIAS
LRP
WL
FORMAT
SR (Sample Rate Selection)
USB
Mode
0 RBYPEN LBYPEN MBCTRL[1:0]
0
0
0
0
0
VMIDSEL [1:0] LINPUT1 RINPUT1
dc BIAS dc BIAS
ENABLE ENABLE
0
0
0
0
NGTH (Threshold)
0
NGAT
ALCSEL
MAXGAIN
ALCL (Target Level)
Reserved (must write zeros)
0 ALCZCE
HLD (Hold Time)
0
DCY (Decay Time)
ATK (Attack Time)
RESET (writing 000000000 to this register resets all registers to their default state)
Table 21 Control Register Map
w
AI Rev 3.0 May 2004
32