WM8960_06 Datasheet, PDF (58/88 Pages) Wolfson Microelectronics plc – Stereo CODEC with 1W Stereo Class D Speaker Drivers and Headphone Drivers for Portable Audio Applications

WM8960
Preliminary Technical Data
Although the ADC and DAC can run at different sample rates, they share the same bit clock pin
BCLK.
When operating in master mode, register bits BCLKDIV[3:0] should be set to an appropriate value to
ensure that there are sufficient BCLK cycles to transfer the complete data word from the ADCs and
to the DACs.
When operating in slave mode, the host device must provide sufficient BCLK cycles to transfer
complete data words to the ADCs and DACs.
Table 41 shows the maximum word lengths supported for a given SYSCLK and BCLKDIV, assuming
that either the ADCs or DACs are running at maximum rate (i.e. ADCDIV[2:0]=000 or
DACDIV[2:0]=000).
SYSCLK
BCLKDIV[3:0] BCLK RATE MAXIMUM WORD LENGTH
(=MCLK OR PLL OUTPUT)
(MHz)
(MASTER MODE) (AT MAXIMUM ADC OR
(MHz)
DAC SAMPLE RATE)
0000 (=1)
12.288
32
0001 (=1.5)
8.192
32
0010 (=2)
6.144
32
0011 (=3)
4.096
32
0100 (=4)
3.072
32
0101 (=5.5)
2.2341818
20
0110 (=6)
2.048
20
12.288
0111 (=8)
1.536
16
1000 (=11)
1.117091
8
1001 (=12)
1.024
8
1010 (=16)
0.768
8
1011 (=22)
0.558545
N/A
1100 (=24)
0.512
N/A
1101 (=32)
0.384
N/A
1110 (=32)
0.384
N/A
1111 (=32)
0.384
N/A
0000 (=1)
11.2896
32
0001 (=1.5)
7.5264
32
0010 (=2)
5.6448
32
0011 (=3)
3.7632
32
0100 (=4)
2.8224
32
0101 (=5.5)
2.052655
20
0110 (=6)
1.8816
20
11.2896
0111 (=8)
1.4112
16
1000 (=11)
1.026327
8
1001 (=12)
0.9408
8
1010 (=16)
0.7056
8
1011 (=22)
0.513164
N/A
1100 (=24)
0.4704
N/A
1101 (=32)
0.3528
N/A
1110 (=32)
0.3528
N/A
1111 (=32)
0.3528
N/A
Table 41 BCLK Divider in Master Mode
OTHER SAMPLE RATE CONTROL BITS
The ALC, de-emphasis filter and 3D stereo enhance functions all need to be configured for the
chosen sample rate when in use, as show in Table 42.
ADC_ALC_SR should be configured to match the chosen ADC sample rate.
DEEMPH, 3DUC and 3DUC should be configured to match the chosen DAC sample rate.
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PTD, September 2006, Rev 2.0
58