WM8960 Datasheet, PDF (50/92 Pages) Wolfson Microelectronics plc – Stereo CODEC with 1W Stereo Class D Speaker Drivers and Headphone Drivers for Portable Audio Applications

WM8960
Production Data
Figure 28 I²S Justified Audio Interface (assuming n-bit word length)
In DSP/PCM mode, the left channel MSB is available on either the 1^st (mode B) or 2^nd (mode A) rising
edge of BCLK (selectable by LRP) following a rising edge of LRC. Right channel data immediately
follows left channel data. Depending on word length, BCLK frequency and sample rate, there may be
unused BCLK cycles between the LSB of the right channel data and the next sample.
In device master mode, the LRC output will resemble the frame pulse shown in Figure 29 and Figure
30. In device slave mode, Figure 31 and Figure 32, it is possible to use any length of frame pulse less
than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK period before
the rising edge of the next frame pulse.
Figure 29 DSP/PCM Mode Audio Interface (mode A, LRP=0, Master)
Figure 30 DSP/PCM Mode Audio Interface (mode B, LRP=1, Master)
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PD, August 2013, Rev 4.2
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