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WM8325 Datasheet, PDF (36/254 Pages) Wolfson Microelectronics plc – Processor Power Management Subsystem
WM8325
TRANSITION
SEQUENCE
ON (see note 1)
EVENT
RTC alarm
GPIO ON request
WAKE
O¯¯N pin request
Software WAKE
Watchdog timeout
RTC alarm
GPIO WAKE request
PVDD undervoltage
OFF
O¯¯N pin request
Watchdog timeout
Hardware Reset
Software Reset
Power Management
Undervoltage Reset
Software OFF request
ON pin request
Thermal shutdown
PVDD undervoltage
SLEEP
PVDD shutdown
GPIO OFF request
Power Sequence failure
Internal LDO error
Software SLEEP request
GPIO SLEEP request
Table 3 Power State Transition Events
Production Data
NOTES
An ON request occurs if the RTC Alarm occurs
in the OFF power state. See Section 20.
Requires a GPIO to be configured as “Power
On request” or “Power On/Off request”. See
Section 21.
Requires the O¯¯N pin to be configured to
generate ON request. See Section 11.6.
Writing CHIP_SLP = 0. See Table 2.
Requires the Watchdog to be configured to
generate WAKE request. See Section 25.
A WAKE request occurs if the RTC Alarm
occurs in the SLEEP power state. See
Section 20.
Requires a GPIO to be configured as
“Sleep/Wake request”. See Section 21.
Requires the PVDD monitor circuit to be
configured to generate WAKE request. See
Section 24.4.
Requires the O¯¯N pin to be configured to
generate WAKE request. See Section 11.6.
Requires the Watchdog to be configured to
generate Device Reset. See Section 25.
See Section 24.
See Section 24.
Configurable option for each LDO/DC-DC
converter. See Section 15.
Writing CHIP_ON = 0. See Table 2.
Requires the O¯¯N pin to be configured to
generate OFF request. See Section 11.6.
See Section 26.
Requires the PVDD monitor circuit to be
configured to generate OFF request. See
Section 24.4.
PVDD has fallen below the SHUTDOWN
threshold. See Section 24.4.
Requires a GPIO to be configured as “Power
On/Off request”. See Section 21.
DC-DC converters, LDOs or CLKOUT circuits
have failed to start up within the permitted time.
Error condition detected in LDO13
Writing CHIP_SLP = 1. See Table 2.
Requires a GPIO to be configured as “Sleep
request” or “Sleep/Wake request”. See
Section 21.
ON SOURCE /
OFF SOURCE
ON_TRANS, ON_RTC_ALM
ON_TRANS, ON_GPIO
ON_TRANS, ON_ON_PIN
ON_SW_REQ
ON_WDOG_TO
ON_RTC_ALM
ON_GPIO
ON_SYSLO
ON_ON_PIN
RESET_WDOG
(See note 2)
RESET_HW
(See note 2)
RESET_SW
(See note 2)
RESET_CNV_UV
(See note 2)
OFF_SW_REQ
OFF_ON_PIN
OFF_THERR
OFF_PVDD
OFF_PVDD
OFF_GPIO
OFF_PWR_SEQ
OFF_INTLDO_ERR
See note 3
See note 3
Notes:
1. An ON sequence is only permitted when the supply voltage PVDD exceeds a programmable threshold VSYSOK. See
Section 24.4 for details of PVDD voltage monitoring.
2. These Reset conditions result in an OFF transition followed by an ON transition. These events are recorded as Reset
events in the ‘ON Source’ register.
3. SLEEP events are not recorded in the ‘OFF Source’ register.
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PD, February 2012, Rev 4.0
36