WM8991 Datasheet, PDF (35/174 Pages) Wolfson Microelectronics plc – Mobile Multimedia CODEC with Dual-Mode Class AB/D Speaker Driver

Pre-Production
WM8991
CONTROL INTERFACE TIMING – 4-WIRE MODE
4-wire mode supports readback via SDOUT which is available as a GPIO pin function.
CSB
SCLK
t
CSU
t _SCY
t _CHO
SDIN
t
DSU
t
DHO
LSB
Figure 11 Control Interface Timing – 4-Wire Serial Control Mode (Write Cycle)
CSB
SCLK
SDOUT
LSB
t
DL
Figure 12 Control Interface Timing – 4-Wire Serial Control Mode (Read Cycle)
Test Conditions
DCVDD=1.8V, DBVDD=AVDD=HPVDD=3.3V, SPKVDD=5V, DGND=AGND=HPGND=SPKGND=0V, TA =+25^oC, Slave Mode,
fs=48kHz, MCLK=256fs, 24-bit data, unless otherwise stated.
PARAMETER
Program Register Input Information
SCLK rising edge to CSB falling edge
SCLK falling edge to CSB rising edge
SCLK pulse cycle time
SCLK pulse width low
SCLK pulse width high
SDIN to SCLK set-up time
SDIN to SCLK hold time
SDOUT propagation delay from SCLK rising edge
Pulse width of spikes that will be suppressed
SCLK falling edge to SDOUT transition
SYMBOL
tCSU
tCHO
tSCY
tSCL
tSCH
tDSU
tDHO
tDL
tps
tDL
MIN
TYP
MAX
UNIT
40
ns
40
ns
200
ns
80
ns
80
ns
40
ns
10
ns
10
ns
0
5
ns
40
ns
w
PP, May 2008, Rev 3.1
35