WM8772_05 Datasheet, PDF (17/73 Pages) Wolfson Microelectronics plc – 24-bit, 192kHz 6-Channel Codec with Volume Control

Production Data
WM8772EDS – 28 LEAD SSOP
BCLK
(Output)
LRC
(Output)
DOUT
t_DL
t_DDA
DIN1/2/3
t_DST
t_DHT
Figure 15 Digital Audio Data Timing – Master Mode
Test Conditions
AVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN, DGND = 0V, TA = +25^oC, Master Mode, fs = 48kHz, MCLK = 256fs unless
otherwise stated.
PARAMETER
SYMBOL
Audio Data Input Timing Information
LRC propagation delay from
tDL
BCLK falling edge
DOUT propagation delay
tDDA
from BCLK falling edge
DIN1/2/3 setup time to
tDST
BCLK rising edge
DIN1/2/3 hold time from
tDHT
BCLK rising edge
TEST CONDITIONS
Table 3 Digital Audio Data Timing – Master Mode
MIN
TYP
MAX
UNIT
0
10
ns
0
10
ns
10
ns
10
ns
w
PD Rev 4.2 October 2005
17