WM8215 Datasheet, PDF (16/31 Pages) Wolfson Microelectronics plc – 60MSPS 10-bit 3-Channel CCD Digitiser

WM8215
Production Data
CDS/NON-CDS PROCESSING
For CCD type input signals, containing a fixed reference/reset level, the signal may be processed
using Correlated Double Sampling (CDS), which will remove pixel-by-pixel common mode noise. With
CDS processing the input waveform is sampled at two different points in time for each pixel, once
during the reference/reset level and once during the video level. To sample using CDS, register bit
CDS must be set to 1 (default). This causes the signal reference to come from the video reference
level as shown in Figure 11.
The video sample is always taken on the falling edge of the input VSMP signal (VS). In CDS-mode
the reset level is sampled on the falling edge of the RSMP input signal (RS).
For input signals that do not contain a reference/reset level (e.g. CIS sensor signals), non-CDS
processing is used (CDS=0). In this case, the video level is processed with respect to the voltage on
pin VRLC/VBIAS. The VRLC/VBIAS voltage is sampled at the same time as VSMP samples the
video level in this mode.
Figure 11 CDS/non-CDS Input Configuration
OFFSET ADJUST AND PROGRAMMABLE GAIN
The output from the CDS block is a differential signal, which is added to the output of an 8-bit Offset
DAC to compensate for offsets and then amplified by a 9-bit PGA. The gain and offset for each
channel are independently programmable by writing to control bits DAC[7:0] and PGA[8:0].
The gain characteristic of the WM8215 PGA is shown in Figure 12. Figure 13 shows the maximum
device input voltage that can be gained up to match the ADC full-scale input range (default=2V).
w
PD, Rev 4.3, September 2012
16