WM8987 Datasheet, PDF (15/59 Pages) Wolfson Microelectronics plc – Stereo CODEC for Portable Audio Applications

Production Data
CONTROL INTERFACE TIMING – 2-WIRE MODE
SDIN
SCLK
t₃
t₆
t₁
t₅
t₂
t₇
t₉
t₃
t₄
WM8987L
t₈
Figure 5 Control Interface Timing – 2-Wire Serial Control Mode
Test Conditions
DCVDD = 1.42V, DBVDD = 3.3V, DGND = 0V, TA = +25^oC, Slave Mode, fs = 48kHz, MCLK = 256fs, 24-bit data, unless
otherwise stated.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Program Register Input Information
SCLK Frequency
0
526
kHz
SCLK Low Pulse-Width
SCLK High Pulse-Width
Hold Time (Start Condition)
t1
1.3
us
t2
600
ns
t3
600
ns
Setup Time (Start Condition)
Data Setup Time
SDIN, SCLK Rise Time
SDIN, SCLK Fall Time
t4
600
t5
100
t6
t7
ns
ns
300
ns
300
ns
Setup Time (Stop Condition)
t8
600
ns
Data Hold Time
Pulse width of spikes that will be suppressed
t9
tps
0
900
ns
5
ns
w
PD Rev 4.0 August 2008
15