WM8766 Datasheet, PDF (15/32 Pages) Wolfson Microelectronics plc – 24 BIT 192KHZ 6 CHANNEL DAC

Preliminary Technical Data
WM8766
AUDIO INTERFACE FORMATS
Audio data is applied to the internal DAC filters via the Digital Audio Interface. 5 popular interface
formats are supported:
• Left Justified mode
• Right Justified mode
• I2S mode
• DSP Early mode
• DSP Late mode
All 5 formats send the MSB first and support word lengths of 16, 20, 24 and 32 bits, with the
exception of 32 bit right justified mode, which is not supported.
In left justified, right justified and I²S modes, the digital audio interface receives DAC data on the
DIN1/2/3 inputs. Audio Data for each stereo channel is time multiplexed with LRCLK indicating
whether the left or right channel is present. LRCLK is also used as a timing reference to indicate the
beginning or end of the data words.
In left justified, right justified and I²S modes, the minimum number of BCLKs per LRCLK period is 2
times the selected word length. LRCLK must be high for a minimum of word length BCLKs and low
for a minimum of word length BCLKs. Any mark to space ratio on LRCLK is acceptable provided the
above requirements are met.
In DSP early or DSP late mode, all 6 DAC channels are time multiplexed onto DIN1. LRCLK is used
as a frame sync signal to identify the MSB of the first word. The minimum number of BCLKs per
LRCLK period is 6 times the selected word length. Any mark to space ratio is acceptable on LRCLK
provided the rising edge is correctly positioned.
LEFT JUSTIFIED MODE
In left justified mode, the MSB of DIN1/2/3 is sampled by the WM8766 on the first rising edge of
BCLK following a LRCLK transition. LRCLK is high during the left samples and low during the right
samples, see Figure 11.
Figure 11 Left Justified Mode Timing Diagram
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PTD Rev 2.3 February 2004
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