WM8959 Datasheet, PDF (118/155 Pages) Wolfson Microelectronics plc – Mobile Multimedia DAC with Dual-Mode Class AB/D Speaker Driver

WM8959
CHIP RESET AND ID
Pre-Production
The device ID can be read back from register 0. Writing to this register will reset the device.
REGISTER
ADDRESS
R0 (00h)
Reset / ID
BIT
15:0
LABEL
SW_RESET_
CHIP_ID
[15:0]
(rr)
DEFAULT
DESCRIPTION
8990h
Writing to this register resets all registers
to their default state.
Reading from this register will indicate
device family ID 8990h.
Table 71 Chip Reset and ID
SAVING POWER AT HIGHER SUPPLY VOLTAGE
The AVDD supply of the WM8959 can operate between 2.7V and 3.6V. By default, all analogue
circuitry on the device is optimized to run at 3.3V. This set-up is also good for all other supply
voltages down to 2.7V. At lower voltages, performance can be improved by increasing the bias
current. If low power operation is preferred the bias current can be left at the default setting. This is
controlled as shown in Table 72.
REGISTER BIT LABEL DEFAULT
ADDRESS
R51 (33h)
8:7 VSEL 11
[1:0]
Table 72 Bias Optimisation
DESCRIPTION
Analogue Bias Optimisation
00 = Reserved
01 = Bias current optimized for AVDD=2.7V
1X = Bias current optimized for AVDD=3.3V
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PP, May 2008, Rev 3.1
118