W83194BR-C Datasheet, PDF (8/13 Pages) Winbond – 200MHZ CLOCK FOR CAMINO CHIPSET

W83194BR-C
PRELIMINARY
6.1 Register 0: CPU Frequency Select Register
Bit @PowerUp
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Pin
Description
-
SSEL3 ( Frequency table selection by software via I²C)
-
SSEL2 ( Frequency table selection by software via I²C)
-
SSEL1 ( Frequency table selection by software via I²C)
-
SSEL0 ( Frequency table selection by software via I²C)
-
0 = Selection by hardware
1 = Selection by software I²C - Bit (1,2, 6:4)
-
SSEL4 (Frequency table selection by software via I²C )
-
SSEL5 (Frequency table selection by software via I²C )
-
0 = Normal
1 = Spread Spectrum enabled
6.2 Register 1 : CPU Clock Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7
1
27 48MHz(Active / Inactive)
6
1
28 24_48MHz(Active / Inactive)
5
0
- 0 = ±0.25% Center type Spread Spectrum Modulation
1 =±0.5% Center type Spread Spectrum Modulation
4
1
42 CPU/2(Active / Inactive)
3
0
- 0 = Running
1 = Tristate all outputs
2
1
39 CPUCLK2(Active / Inactive)
1
1
36 CPUCLK1(Active / Inactive)
0
1
35 CPUCLK0(Active / Inactive)
6.3 Register 2: PCI Clock Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7
1
16 PCICLK7 (Active / Inactive)
6
1
15 PCICLK6 (Active / Inactive)
5
1
13 PCICLK5 (Active / Inactive)
4
1
12 PCICLK4 (Active / Inactive)
3
1
11 PCICLK3 (Active / Inactive)
2
1
10 PCICLK2 (Active / Inactive)
1
1
8 PCICLK1 (Active / Inactive)
0
1
7 PCICLK0 (Active / Inactive)
Publication Release Date: Dec. 1999
-8-
Revision 0.40