W83194BR-C Datasheet, PDF (3/13 Pages) Winbond – 200MHZ CLOCK FOR CAMINO CHIPSET

W83194BR-C
4.0 PIN DESCRIPTION
IN - Input
OUT - Output
I/O - Bi-directional Pin
# - Active Low
* - Internal 250kΩ pull-up
4.1 Crystal I/O
SYMBOL
PIN
Xin
4
Xout
5
PRELIMINARY
I/O
IN
OUT
FUNCTION
Crystal input with internal loading capacitors and
feedback resistors.
Crystal output at 14.318MHz nominally.
4.2 CPU, 3V66, PCI, IOAPIC Clock Outputs
SYMBOL
CPUCLK [0:2]
CPU/2
PD#
SEL133/100#
PCICLK0/ *FS2
PCICLK1/ *FS1
PCICLK[2,8:9]
PCICLK7/ *FS3
3V66 [0:2]
IOAPIC[0:2]
PIN
45,44
42
31
25
7
8
10,11,12,13,15
,18,19
16
21, 22, 23
46, 45, 1
I/O
OUT
O
IN
IN
I/O
I/O
I/O
I/O
OUT
O
FUNCTION
Low skew (< 250ps) clock outputs for host
frequencies such as CPU and Chipset.
As a reference signal for DRCG. The voltage is
determined by VDDQ2.
Power Down mode when driven low.
Frequency selection input pin.
3.3V PCI clock during normal operation.
Latched input for FS2 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
Low skew (< 250ps) PCI clock outputs.
Latched input for FS1 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
Low skew (< 250ps) PCI clock outputs.
Low skew (< 250ps) PCI clock outputs.
Latched input for FS3 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
3.3V output clocks for the chipset.
Synchronous with CPU clocks, 2.5V.
Publication Release Date: Dec. 1999
-3-
Revision 0.40