W5830 Datasheet, PDF (8/14 Pages) Winbond – HIGH FIDELITY Power Speech

Preliminary W583XXX
"DEFPAGE" decides the page operation mode of W583xxx. The default setting of the page mode is
1-page mode. The 8-page, 16-page or 32-page mode must be declared in order to reach the interrupt
vector/label from 256 to 2047 when the interrupt vector/label is beyond 0-255.
The W583xxx can communicate with an external microprocessor through the simple serial CPU
interface, which is the same as the W581xx series. The CPU interface consists of the TG1, TG2, and
STPA/BUSY pins. "NORMAL" and "CPU" decide whether the operation mode of W583xxx will be
normal mode or CPU mode.
"OSC_3MHz" and "OSC_1.5MHz" select the frequency of the system clock. "VOUT_DAC" and
"VOUT_PWM" select the voice output type.
Interrupt Vector Allocation
The W583xxx provides a total of 8 trigger inputs to communicate with the outside world. Each trigger
pin can invoke 2 dedicate interrupt vectors depending on TG pin status. The table below show the
relationship between TG pin status and interrupt vectors.
Interrupt vectors 8-15 are not allocated for TG pins in W583S10 because only TG1-TG4 pins are
provided in this chip.
INTERRUPT VECTOR
0
1
2
3
4
5
6
7
32
TRIGGER SOURCE
TG1F
TG2F
TG3F
TG4F
TG1R
TG2R
TG3R
TG4R
POI
INTERRUPT VECTOR
8
9
10
11
12
13
14
15
-
TRIGGER SOURCE
TG5F
TG6F
TG7F
TG8F
TG5R
TG6R
TG7R
TG8R
-
Instruction Set
There are two types of instruction in the W583xxx, unconditional and conditional instructions. The first
type of instructions are executed immediately after they are issued. The second type of instructions
are executed only when the conditions specified in the instruction are satisfied. All the instructions are
listed in the following table.
The cycle time for each instruction is 2/Sampling Frequency(Fs). For Fs = 6.0 KHz, the cycle time is
333 µS.
JP
JP
LD
* LD
UNCONDITIONAL
G
Rn
EN0, value
EN1, value
JP
JP
LD
* LD
CONDITIONAL
G
Rn
EN0, value
EN1, value
@STS
@STS
@STS
@STS
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