W5830 Datasheet, PDF (7/14 Pages) Winbond – HIGH FIDELITY Power Speech

Preliminary W583XXX
4. EN0, EN1 Registers
BIT
7
6
EN0 TG4R TG3R
EN1 TG8R TG7R
5
TG2R
TG6R
4
TG1R
TG5R
3
TG4F
TG8F
2
TG3F
TG7F
1
TG2F
TG6F
0
TG1F
TG5F
A "1" means "enabled", while a "0" means "disabled" for that edge of the particular TG pin. For
example, the instruction "LD EN0, 0x0F" enables all the falling edge triggers of TG1-TG4, while
disabling all the rising edge triggers of TG1-TG4. The user can modify the EN0 and EN1 registers
during operation of the W583xxx to achieve various kinds of trigger functions, like retriggerable or
not, one shot or level hold play mode, etc.
That is to say, users can change the contents of EN0, EN1 register during synthesis at will to
determine which trigger pin is to be enabled or disabled for its falling/rising edge.
EN1 register is not provided in W583S10.
5. STOP Register
BIT
7
6
5
4
3
2
1
0
STOP STH STG STF STE STD STC STB STA
The STOP register is used to control the status of the STPA-STPH pins. For example STB bit, the
corresponding bit 1 of the STOP register is used to drive the output buffer of STPB pin, an inverted
stage, to show its logic status. Notes that bits 5-7 of STOP register are reserved in W583S10.
6. R0-R7 Registers
These eight registers function as general purpose registers. They can be used to hold interrupt
vector/label. R0 is a special register which can be incremented by "INC" instruction.
Option Control Function
There are four types of option control in W583xxx. They can be determined by a declaration in the
user′s program file, but can not be controlled by register.
FUNCTION
Page Mode
Configuration
Operation
Mode
Oscillator
Frequency
Voice
Output Type
MASK OPTION
DECLARATION
DEFPAGE 1
DEFPAGE 8
DEFPAGE 16
DEFPAGE 32
NORMAL
CPU
OSC_3MHz
OSC_1.5MHz
VOUT_DAC
VOUT_PWM
DEFINITION
256 interrupt vector/label for 1 page, 1 page in total (1-page mode)
256 interrupt vector/label for 1 page, 8 pages in total (8-page mode)
128 interrupt vector/label for 1 page, 16 pages in total (16-page mode)
64 interrupt vector/label for 1 page, 32 pages in total (32-page mode)
Normal mode operation
CPU mode operation
3 MHz oscillator
1.5 MHz oscillator
DAC (AUD) output
PWM output
Publication Release Date: March 1999
-7-
Revision A1