W83194BR-97 Datasheet, PDF (7/11 Pages) Winbond – 200MHZ CLOCK FOR CAMINO CHIPSET

W83194BR-97
PRELIMINARY
5.4 Register 3: 3V66 Clock Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7
1
34 3V66_0(Active / Inactive)
6
1
33 3V66_1(Active / Inactive)
5
1
32 3V66_2(Active / Inactive)
4
X
- FS1#
3
0
- 0 = ±0.25% Center type Spread Spectrum Modulation
1 =±0.5% Center type Spread Spectrum Modulation
2
0
- 0 = Running
1 = Tristate all outputs
1
X
- FS3#
0
X
- FS2#
5.5 Register 4: PCI Clock Additional Register (1 = Active, 0 = Inactive)
Bit @PowerUp Pin
Description
7
1
26 24_48MHz(Active / Inactive)
6
1
27 48MHz(Active / Inactive)
5
X
- FS0#
4
1
22 PCICLK10 (Active / Inactive)
3
1
21 PCICLK9 (Active / Inactive)
2
1
20 PCICLK8 (Active / Inactive)
1
1
- Reserve
0
X
- FS4#
5.6 Register 5: Skew Register
Bit @PowerUp Pin
Description
7
1
- Skew2 (CPU to 3V66 skew program bit)
6
0
- Skew1 (CPU to 3V66 skew program bit)
5
0
- Skew0 (CPU to 3V66 skew program bit)
4
1
- Reserve
3
1
- Reserve
2
1
- Reserve
1
1
- Reserve
0
1
- Reserve
Publication Release Date: Dec. 1999
-7-
Revision 0.35